A 1 V 6-bit 2.4 GS/s Nyquist CMOS DAC for UWB Systems

被引:0
|
作者
Kim, Bong Chan [1 ]
Cho, Min-Hyung [1 ]
Kim, Yi-Gyeong [1 ]
Kwon, Jong-Kee [1 ]
机构
[1] Elect & Telecommun Res Inst, Taejon 305700, South Korea
关键词
digital-to-analog converter (DAC); full-Nyquist; low threshold voltage; very high-speed; ultra-wideband (UWB);
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 6-bit 2.4 GS/s current-steering DAC fabricated in a 65 nm CMOS technology for ultra-wideband (UWB) systems is presented. T he prototype achieves a measured spurious-free dynamic range (SFDR) of more than 36 dB over the Nyquist bandwidth at 2.4 GS/s. Among the 50 measured samples, DNL/INL of 0.02/0.02 LSB was the lowest achievable value. T he DAC core occupies an area of merely 0.023 mm(2) through simplified circuit and careful layout. To operate from a relatively low analog power supply of 1 V, a portion of current cell is implemented using low threshold voltage devices. Total maximum power consumption, including the low voltage differential signaling (LVDS) stage, is 14 mW at 2.4 GS/s.
引用
收藏
页码:912 / 915
页数:4
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