8-GHz Low-Power Voltage-Mode Second-Order Allpass Filter in 65-nm CMOS

被引：0

作者：

Elamien, M. B. ^{[1
]}

Elwakil, A. S. ^{[1
,2
,3
]}

Maundy, B. J. ^{[1
]}

Belostotski, L. ^{[1
]}

机构：

[1] Univ Calgary, Dept Elect & Comp Engn, Calgary, AB, Canada

[2] Univ Sharjah, Dept Elect & Comp Engn, Sharjah, U Arab Emirates

[3] Nile Univ, Nanoelect Integrated Syst Ctr NISC, Giza, Egypt

来源：

2019 26TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2019年

关键词：

Allpass filter; delay element; analog filters; ALL-PASS FILTER; TIME-DELAY;

D O I：

10.1109/icecs46596.2019.8964668

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a CMOS wide-band low-power second-order voltage-mode allpass filter design is proposed as a true time delay element. The proposed allpass filter core design consists of a single transistor, three resistors, one capacitor and one inductor. As a time delay element, the proposed circuit exhibits a group delay of 34 ps within a bandwidth of 8 GHz while consuming only 926 mu W from a 1-V supply voltage. The proposed filter was designed in 65-nm CMOS technology and verified through post-layout simulation results.

引用

页码：146 / 149

页数：4

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