Design of silicon-based suspended inductors for UHF applications

In this paper we present technological procedures to obtain suspended inductors for UHF applications, where the dominant element is the so-called planar inductor. This element does not have up to now a high quality factor Q because in the IC silicon approach inductors suffer of losses due to the conductive substrate. Therefore, the performance of a planar inductor is improved by eliminating the silicon substrate below the planar spiral (hereafter named bulkless inductor). Thus, in order to minimize photolitographic steps, in this paper we are proposing a suitable silicon etching procedure to increase the quality factor of planar inductors by using just 4 photolitographic steps. From simulation results we obtained an inductance of 23 nH (5.85 nH per turn) that represents an augment of 750% when it is compared with a conventional planar inductor.