Fast-locking integer/fractional-N hybrid PLL frequency synthesizer

This paper introduces a new frequency synthesizer architecture that operates in a classical (no high-order EA modulator) fractional-N mode with a wide loop bandwidth in transient and in an integer-N mode with a narrow loop bandwidth in steady state. This unique hybrid operation is executed via simple reconfiguration of frequency dividers and loop filters in the same loop. The hybrid nature of the PLL allows for fast settling and design simplicity simultaneously, and also permits the loop bandwidth switching with the same charge pump current, all of which have been historically a significant hurdle. Behavioral simulations confirm the validity of the proposed approach.