CMOS Integrated Circuits for X-band Phased Array Systems

被引:0
|
作者
Ku, Bon-Hyun [1 ]
Kang, Dong-Woo [2 ]
Hong, Songcheol [3 ]
机构
[1] Univ Calif San Diego, Dept ECE, San Diego, CA 92103 USA
[2] Samsung Elect Co Ltd, DMC R&D Ctr, Suwon, South Korea
[3] Korea Adv Inst Sci & Technol, Dept EE, Daejeon, South Korea
关键词
phased array; CMOS; power amplifier; phase shifter; digital attenuator;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A power amplifier, a phase shifter, a digital attenuator, and a transmitlreceive (T/R) switch are fabricated for X-band phased array applications, which are implemented with CMOS 0.18 um technology. The power amplifier has 2-stage differential and cascode structures. It provides I-dB gain-compressed output power (P-1dB) of 20 dBm and power-added-efficiency (PAE) of 19 % at 8-11 GHz frequencies. The 6-bit phase shifter utilizes embedded switched filter structure which consists of n-MOS transistors as a switch. It has 3600 phase-control range with 5.6 degrees phase resolution. It shows RMS phase and amplitude errors are below 5 degrees and 0.8 dB, and insertion loss of - 15.7 +/- 1.1 dB. The 6-bit digital attenuator is comprised of embedded switched Pi-and T-type attenuators resistive networks and nMOS switches and employs compensation circuits for low insertion phase variation. It has maximum attenuation of 31.5 dB and 0.5 dB amplitude resolution. Its RMS amplitude and phase errors are below 0.4 dB and 2 degrees at 8-11 GHz frequencies, and insertion loss is -10.5 +/- 0.8 dB. The SPDT T/R switch has series and shunt transistor pairs on transmit and receive path, and only one inductance to reduce chip area. It shows insertion loss of -1.5 dB, return loss below -15 dB, and isolation about -30 dB.
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页数:4
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