A new NMOS four-quadrant analog multiplier

被引：10
|
作者：
Boonchu, B [1 ]
Surakampontorn, W [1 ]
机构：
[1] Mahanakorn Univ Technol, Bangkok 10530, Thailand
来源：
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年
关键词：
D O I：
10.1109/ISCAS.2005.1464760
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, an all NMOS voltage-mode four-quadrant analog multiplier based on a basic NMOS differential amplifier that can produce the output signal in voltage form without using resistors is presented. The proposed circuit has been simulated with SPICE and achieved -3dB bandwidth of 120MHz. The power consumption is about 3.6mW from a +/- 2.5V power supply voltage, and the total harmonic distortion is 0.85% with a 1V input signal.
引用
收藏
页码：1004 / 1007
页数：4
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