Time-domain for Evaluation System of ΔΣ Modulator for Class-D Amplifier Using FPGA

被引：0

作者：

Yamashita, Shohei ^{[1
]}

Takemoto, Satoru ^{[1
]}

Hirano, Satoshi ^{[1
]}

Goto, Tomio ^{[1
]}

Sakurai, Masaru ^{[1
]}

机构：

[1] Nagoya Inst Technol, Dept Comp Sci & Engn, Nagoya, Aichi, Japan

来源：

2014 IEEE 3RD GLOBAL CONFERENCE ON CONSUMER ELECTRONICS (GCCE) | 2014年

关键词：

Class-D amplifier; Delta Sigma modulator; Field-programmable gate array;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In digital audio systems, the Delta Sigma modulator has been widely used as a digital-to-analog convertor (DAC) for Class-D amplifiers. The Delta Sigma modulator is generally evaluated in the frequency domain [1]. In this paper, we propose a novel system to evaluate the Delta Sigma modulator in the time domain by observing its transient response. In our system, we use a field-programmable gate array in order to reduce cost. Our system enables the Delta Sigma modulator to evaluate its transient response in the time domain in real time.

引用

页码：455 / 456

页数：2

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