Digital Parameterizable VHDL Module for Multilevel Multiphase Space Vector PWM

被引：30

作者：

Alvarez, Jacobo ^{[1
]}

Lopez, Oscar ^{[1
]}

Freijedo, Francisco D. ^{[1
]}

Doval-Gandoy, Jesus ^{[1
]}

机构：

[1] Univ Vigo, Dept Elect Technol, Vigo 36310, Spain

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2011年 / 58卷 / 09期

关键词：

Field-programmable gate array (FPGA); multilevel converter; multiphase machine; space vector pulsewidth modulation (SVPWM); VHDL; INDUCTION-MOTOR DRIVE; INDUSTRIAL CONTROL; FPGA REALIZATION; MACHINE; DESIGN; IMPLEMENTATION; INVERTERS; CONTROLLER; TOPOLOGIES; CONVERTERS;

D O I：

10.1109/TIE.2010.2100334

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The multilevel multiphase technology combines the benefits of multilevel converters and multiphase machines. Recently, a new multilevel multiphase space vector pulsewidth modulation algorithm that is valid for any number of levels and phases was developed. In this paper, a generic digital VHDL module for such an algorithm is presented. This module is parameterizable in relation to the number of levels, the number of phases, and the number of bits of fractional part of the reference vector. It is also technology independent, reusable, and modular. This circuit has been tested by implementation in a field-programmable gate array, with the goal of a balance of speed and area optimization. It was tested by using a five-level five-phase inverter feeding an induction motor.

引用

页码：3946 / 3957

页数：12

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