A nanowire transistor for high performance logic and terabit non-volatile memory devices

被引：17

作者：

Lee, Hyunjin ^{[1
]}

Ryu, Seong-Wan ^{[1
]}

Han, Jin-Woo ^{[1
]}

Yu, Lee-Eun ^{[1
]}

Im, Maesoon ^{[1
]}

Kim, Chungjin ^{[1
]}

Kim, Sungho ^{[1
]}

Lee, Eujune ^{[1
]}

Kim, Kuk-Hwan ^{[1
]}

Kim, Ju-Hyun ^{[1
]}

Bae, Dong-Il ^{[1
]}

Jeon, Sang Cheol ^{[2
]}

Kim, Kwang Hee ^{[2
]}

Lee, Gi Sung ^{[2
]}

Oh, Joe Sub ^{[2
]}

Park, Yun Chang ^{[2
]}

Bae, Woo Ho ^{[2
]}

Yoo, Jung Jae ^{[2
]}

Yang, Jun Mo ^{[2
]}

Lee, Hee Mok ^{[2
]}

Choi, Yang-Kyu ^{[1
]}

机构：

[1] Korea Adv Inst Sci & Technol, Sch EECS, Div EE, Daejeon 305701, South Korea

[2] Korean Natl Nanofab Ctr, Daejeon 305806, South Korea

来源：

2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2007年

关键词：

D O I：

10.1109/VLSIT.2007.4339761

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A silicon nanowire-FET (SiNAWI-FET) for high performance logic device with consideration of current direction effects and terabit non-volatile memory (NVM) device using an 8nm SiNAWI-NVM with oxide/nitride/oxide (ONO) and omega-gate structure is reported for the first time. N- and P-channel SiNAWI-FET showed the highest driving current on (110)/< 110 > crystal orientation without device rotation, whereas most 3-dimensional NMOS report higher driving current on 45 device rotation rather than 0 degrees. Utilizing an 7nm spherical nanowire on the 8nm SiNAWI-NVM with ONO structure, 1.7V V-T-window was achieved from 12V/80 mu sec program conditions with retention enhancement.

引用

页码：144 / +

页数：2

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