Modeling nonlinear and chaotic dynamics in semiconductor device structures

We review the modeling and simulation of electrical transport instabilities in semiconductors with a special emphasis on recent progress in the application to semiconductor microstructures, The following models are treated in detail: (i) The dynamics of current filaments in the regime of low-temperature impurity breakdown is studied, In particular we perform 2D simulations of the nascence of a filament upon application of a bias voltage. (ii) Vertical electrical transport in layered semiconductor structures like the heterostructure hot electron diode is considered, Periodic as well as chaotic spatio-temporal spiking of the current is obtained. In particular we find long transients of spatio-temporal chaos preceding regular spiking.