A 12-bit 31.1uW 1MS/s SAR ADC with On-Chip Input-Signal-Independent Calibration Achieving 100.4dB SFDR using 256fF Sampling Capacitance

被引:0
|
作者
Shen, Junhua [1 ]
Shikata, Akira [1 ]
Liu, Anping [1 ]
Chalifoux, Frederick [1 ]
机构
[1] Analog Devices Inc, Wilmington, MA 01887 USA
来源
2018 IEEE SYMPOSIUM ON VLSI CIRCUITS | 2018年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 12-bit 31.1uW 1MS/s SAR ADC with on-chip inputsignal-independent calibration achieving 100.4dB SFDR is presented. The proposed calibration overcomes the drawbacks of the traditional split-ADC calibration while obtaining very fast convergence. The calibration only needs one ADC and is input signal independent. Three techniques are proposed to help achieve this, including shuffling of mismatched MSB capacitors. Silicon results fully validated the design and show 16-bit linearity with only 256fF total sampling capacitance.
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页码:91 / 92
页数:2
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