Universal analytic model for tunnel FET circuit simulation

被引:76
|
作者
Lu, Hao [1 ]
Esseni, David [2 ]
Seabaugh, Alan [1 ]
机构
[1] Univ Notre Dame, Dept Elect Engn, Notre Dame, IN 46556 USA
[2] Univ Udine, Dipartimento Ingn Elettr Gestionale & Meccan, I-33100 Udine, Italy
关键词
Analytic model; Band-to-band tunneling; Compact model; SPICE model; Steep-slope switch; Tunnel field-effect transistor (TFET); FIELD-EFFECT TRANSISTORS; INTERFACE TRAPS; VOLTAGE; MOSFETS;
D O I
10.1016/j.sse.2014.12.002
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A simple analytic model based on the Kane-Sze formula is used to describe the current-voltage characteristics of tunnel field-effect transistors (TFETs). This model captures the unique features of the TFET including the decrease in subthreshold swing with drain current and the superlinear onset of the output characteristic. The model also captures the ambipolar current characteristic at negative gate-source bias and the negative differential resistance for negative drain-source biases. A simple empirical capacitance model is also included to enable circuit simulation. The model has fairly general validity and is not specific to a particular TFET geometry. Good agreement is shown with published atomistic simulations of an InAs double-gate TFET with gate perpendicular to the tunnel junction and with numerical simulations of a broken-gap AlGaSb/InAs TFET with gate in parallel with the tunnel junction. (C) 2014 Elsevier Ltd. All rights reserved.
引用
收藏
页码:110 / 117
页数:8
相关论文
共 50 条
  • [1] A Physics-Based Model of Double-Gate Tunnel FET for Circuit Simulation
    Narendiran, A.
    Akhila, K.
    Bindu, B.
    IETE JOURNAL OF RESEARCH, 2016, 62 (03) : 387 - 393
  • [2] A Tunnel-FET device model based on Verilog-A applied to circuit simulation
    Rangel, R. S.
    Agopian, P. G. D.
    Martino, J. A.
    2018 33RD SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO), 2018,
  • [3] AN ACCURATE FET MODEL FOR MICROWAVE NONLINEAR CIRCUIT SIMULATION
    ONOMURA, J
    WATANABE, S
    KAMIHASHI, S
    IEICE TRANSACTIONS ON ELECTRONICS, 1995, E78C (09) : 1223 - 1228
  • [4] Accurate FET model for microwave nonlinear circuit simulation
    Toshiba Corp, Kawasaki-shi, Japan
    IEICE Trans Electron, 9 (1223-1228):
  • [5] Impact of Temperature Variations on the Device and Circuit Performance of Tunnel FET: A Simulation Study
    Narang, Rakhi
    Saxena, Manoj
    Gupta, R. S.
    Gupta, Mridula
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2013, 12 (06) : 951 - 957
  • [6] A Predictive Tunnel FET Compact Model With Atomistic Simulation Validation
    Lin, Yen-Kai
    Khandelwal, Sourabh
    Duarte, Juan Pablo
    Chang, Huan-Lin
    Salahuddin, Sayeef
    Hu, Chenming
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (02) : 599 - 605
  • [7] A universal device model for nanoelectronic circuit simulation
    Ziegler, MM
    Rose, GS
    Stan, MR
    PROCEEDINGS OF THE 2002 2ND IEEE CONFERENCE ON NANOTECHNOLOGY, 2002, : 83 - 88
  • [8] A TABLE LOOKUP FET MODEL FOR ACCURATE ANALOG CIRCUIT SIMULATION
    ROFOUGARAN, A
    ABIDI, AA
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1993, 12 (02) : 324 - 335
  • [9] Table lookup FET model for accurate analog circuit simulation
    Rofougaran, Ahmadreza, 1600, (12):
  • [10] A new empirical model for GaAs FET in nonlinear circuit simulation
    Cao, J
    Lin, F
    Kooi, PS
    Leong, MS
    1997 ASIA-PACIFIC MICROWAVE CONFERENCE PROCEEDINGS, VOLS I-III, 1997, : 517 - 520