A 40-Gb/s transceiver in 0.13-μm CMOS technology

被引：10
|
作者：
Kim, Jeong-Kyoum [1 ]
Kim, Jaeha [3 ]
Kim, Gyudong [2 ]
Chi, Hankyu [1 ]
Jeong, Deog-Kyoon [1 ]
机构：
[1] Seoul Natl Univ, Seoul, South Korea
[2] Silicon Image, Sunnyvale, CA USA
[3] Rambus Inc, Los Altos, CA USA
来源：
2008 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2008年
关键词：
D O I：
10.1109/VLSIC.2008.4586004
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A fully integrated 40-Gb/s transceiver is implemented in a 0.13-mu m CMOS technology. This paper describes the challenges in designing a 20-GHz input sampler, a 20-GHz quadrature LC-VCO, a 20-GHz bang-bang phase detector, and a 40-Gb/s equalizer. The transceiver occupies 1.7 x 2.9mm(2) and dissipates 3.6W from a 1.45-V supply. With the equalizer on, the transmit jitter of the 39-Gb/s 2(15)-1 PRBS data is 1.85ps(rms) over a wire-bonded plastic ball grid array (PBGA) package, an 8-mm RO-4350B PCB trace, an on-board 2.4-mm connector, and a 1m-long 2.4-mm coaxial cable, while the recovered clock jitter is 1.77 ps(rms). The measured BER is < 10(-14).
引用
收藏
页码：196 / +
页数：2
相关论文
共 50 条
  • [41] 10-Gb/s 0.13-μm CMOS Inductorless Modified-RGC Transimpedance Amplifier
    Taghavi, Mohammad Hossein
    Belostotski, Leonid
    Haslett, James W.
    Ahmadi, Peyman
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2015, 62 (08) : 1971 - 1980
  • [42] DIFFERENTIAL Tx AMPLIFIER AT 24 GHz IN 0.13-μm CMOS TECHNOLOGY
    Alexanian, Angelos
    Carrez, Frederic
    MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, 2009, 51 (02) : 532 - 536
  • [43] A simultaneously bidirectional inductively coupled link in a 0.13-μm CMOS technology
    Jeon, Min-Ki
    Yoo, Changsik
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2017, 45 (04) : 515 - 529
  • [44] A 13.5-mW 10-Gb/s 4-PAM Serial Link Transmitter in 0.13-μm CMOS Technology
    Song, Bongsub
    Kim, Kyunghoon
    Lee, Junan
    Chung, Jinil
    Choi, Youngjung
    Burm, Jinwook
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2014, 61 (09) : 646 - 650
  • [45] A Compact ROSA Module for Serial 40-Gb/s Optical Transceiver
    Kang, Sae-Kyoung
    Lee, Joon Ki
    Huh, Joon-Young
    Kim, Kwangjoon
    Lee, Jonghyun
    2013 IEEE 63RD ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2013, : 1850 - 1854
  • [46] A multigigabit backplane transceiver core in 0.13-μm CMOS with a power-efficient equalization architecture
    Krishna, K
    Yokoyama-Martin, DA
    Caffee, A
    Jones, C
    Loikkanen, M
    Parker, J
    Segelken, R
    Sonntag, JL
    Stonick, J
    Titus, S
    Weinlader, D
    Wolfer, S
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (12) : 2658 - 2666
  • [47] A 40-Gb/s 9.2-mW CMOS Equalizer
    Manian, Abishek
    Razavi, Behzad
    2015 SYMPOSIUM ON VLSI CIRCUITS (VLSI CIRCUITS), 2015,
  • [48] A 7.5-Gb/s Referenceless Transceiver With Adaptive Equalization and Bandwidth-Shifting Technique for Ultrahigh-Definition Television in a 0.13-μm CMOS Process
    Song, Junyoung
    Hwang, Sewook
    Lee, Hyun-Woo
    Kim, Chulwoo
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2014, 61 (11) : 865 - 869
  • [49] A 12.5-Gb/s parallel phase detection clock and data recovery circuit in 0.13-μm CMOS
    Ohtomo, Yusuke
    Nishimura, Kazuyoshi
    Nogawa, Masafumi
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (09) : 2052 - 2057
  • [50] A fully integrated 10-Gb/s receiver with adaptive optical dispersion equalizer in 0.13-μm CMOS
    Momtaz, Afshin
    Chung, David
    Kocaman, Namik
    Cao, Jun
    Caresosa, Mario
    Zhang, Bo
    Fujimori, Ichiro
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (04) : 872 - 880
12345