SimulElec, a Delphi written simulator for power Electrical Engineering, using VHDL-AMS modeling

被引：0

作者：

Legrand, Fabien ^{[1
]}

Azurmendi, Maria ^{[2
]}

Martin, Fernando ^{[2
]}

Fontan, Luis ^{[2
]}

Charlot, Jean-Jacques ^{[3
]}

Couture, Nadine ^{[4
]}

机构：

[1] Algotech Informat, Bidart, France

[2] CEIT & TECNUN, Dept Elect & Commun, San Sebastian, Spain

[3] ELECT SOFTWARE, Setif, Algeria

[4] LIPSI ESE, Bidart, France

来源：

BMAS 2007: PROCEEDINGS OF THE 2007 IEEE INTERNATIONAL BEHAVIORAL MODELING AND SIMULATION WORKSHOP | 2007年

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Few simulators are designed for power electrical engineering and they should be usually used by high skilled users. Simul'Elec is an electrical simulator, part of an electrical CAD software. This simulator is designed with the focus of giving access to simulation to electrical CAD users usually not very familiar with simulation tools. It provides a graphical modeling interface. This friendly simulator written in Delphi integrates graphical user interface to generate VHDL-AMS models and a compiler to simulate its.

引用

页码：94 / +

页数：2

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