A Digital PLL Scheme for Three-Phase System Using Modified Synchronous Reference Frame

被引：123

作者：

da Silva, Carlos Henrique ^{[1
]}

Pereira, Rondineli Rodrigues ^{[1
]}

Borges da Silva, Luiz Eduardo ^{[1
]}

Lambert-Torres, Germano ^{[1
]}

Bose, Bimal K. ^{[2
]}

Ahn, Se Un ^{[3
]}

机构：

[1] Univ Fed Itajuba, BR-37500903 Itajuba, MG, Brazil

[2] Univ Tennessee, Dept Elect Engn & Comp Sci, Knoxville, TN 37996 USA

[3] CPFL Piratininga Light & Power Co, BR-13088900 Campinas, SP, Brazil

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2010年 / 57卷 / 11期

关键词：

Active filter; digital signal processor (DSP); phase-locked loop (PLL); synchronous reference frame (SRF); ALGORITHMS;

D O I：

10.1109/TIE.2010.2040554

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper proposes a novel phase-locked loop (PLL) control strategy to synthesize unit vector using the modified synchronous reference frame (MSRF) instead of the traditional synchronous reference frame. The unit vector is used for vector rotation or inverse rotation in vector-controlled three-phase grid-connected converting equipment. The developed MSRF-PLL is fast in transient response compared to standard PLL technique. The performance is robust against disturbances on the grid, voltage wave with harmonic distortion, and noise. The proposed algorithm has been analyzed in detail and was fully implemented digitally using digital signal processor TMS320F2812. The experimental evaluation of the MSRF-PLL in a shunt active power filter confirms its fast dynamic response, noise immunity, and applicability.

引用

页码：3814 / 3821

页数：8