Tighter bounds on full access probability in fault-tolerant multistage interconnection networks

被引:8
|
作者
Rai, S [1 ]
Oh, YC
机构
[1] Louisiana State Univ, Dept Elect & Comp Engn, Baton Rouge, LA 70803 USA
[2] Samsung Elect Co Ltd, Informat & Telecommun Business, Seoul, South Korea
关键词
bounding technique; fault tolerance; full access probability; network reliability;
D O I
10.1109/71.755833
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper proposes a cut-based technique to compute bounds on the full access probability of an extra stage shuffle exchange network (ESEN) and a wrap-around inverse banyan network (WIBN). Note that the problem of finding an exact full access probability is known to be NP-hard. Our results obtain tighter bounds as compared to those using existing techniques. For a small size multistage interconnection network, it deviates less from the exact value. We also notice that our proposed lower bound is conservative. Further, the lower bound is important as it suggests that a network is at least this much reliable.
引用
收藏
页码:328 / 335
页数:8
相关论文
共 50 条
  • [21] Adaptive message routing in a class of fault-tolerant multistage interconnection networks
    Zhou, YQ
    Min, YH
    COMPUTERS & ELECTRICAL ENGINEERING, 1997, 23 (04) : 239 - 247
  • [22] Distributed routing in a fault-tolerant multistage interconnection network
    Wang, SJ
    INFORMATION PROCESSING LETTERS, 1997, 63 (04) : 205 - 210
  • [23] LARGE FAULT-TOLERANT INTERCONNECTION NETWORKS
    BERMOND, JC
    HOMOBONO, N
    PEYRAT, C
    GRAPHS AND COMBINATORICS, 1989, 5 (02) : 107 - 123
  • [24] TIGHTER TIME-BOUNDS ON FAULT-TOLERANT BROADCASTING AND GOSSIPING
    GARGANO, L
    NETWORKS, 1992, 22 (05) : 469 - 486
  • [25] Fault-tolerant gamma interconnection networks by chaining
    Chen, CW
    Lu, NP
    Chen, TF
    Chung, CP
    IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2000, 147 (02): : 75 - 81
  • [26] Modeling and analysis of fault tolerant multistage interconnection networks
    Choi, M
    Park, N
    Lombardi, F
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2003, 52 (05) : 1509 - 1519
  • [27] FAULT-TOLERANT PROCESSOR INTERCONNECTION NETWORKS.
    Imase, Makoto
    Soneoka, Terunao
    Okada, Keiji
    Systems and Computers in Japan, 1986, 17 (08): : 21 - 30
  • [28] Fault-Tolerant Metric Dimension of Interconnection Networks
    Hayat, Sakander
    Khan, Asad
    Malik, Muhammad Yasir Hayat
    Imran, Muhammad
    Siddiqui, Muhammad Kamran
    IEEE ACCESS, 2020, 8 : 145435 - 145445
  • [29] A REGULAR FAULT-TOLERANT ARCHITECTURE FOR INTERCONNECTION NETWORKS
    HAWKES, LW
    IEEE TRANSACTIONS ON COMPUTERS, 1985, 34 (07) : 677 - 680
  • [30] A fault-tolerant method for wormhole multistage networks
    Skeie, T
    INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED PROCESSING TECHNIQUES AND APPLICATIONS, VOLS I-IV, PROCEEDINGS, 1998, : 637 - 644