Impact on mask technology from the viewpoint of DRAM trend

被引:0
|
作者
Koyama, K [1 ]
机构
[1] NEC, ULSI Device Dev Lab, Sagamihara, Kanagawa 2291198, Japan
来源
关键词
DRAM; CD linearity; defect inspection; address size; reticle size; pellicle;
D O I
10.1117/12.328805
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The development of DRAM is currently in transition from a 0.25um design rule for 256Mbit DRAM to a 0.18um design rule for 1Gbit DRAM. There are five important points to improving mask technology for DRAM fabrication below 0.18um design rule. One is good CD linearity between mask pattern size and design pattern size with minimal pattern size and density dependence. Second is high defect inspection sensitivity and good repair capability in PSM and OPC mask patterns, any angle patterns, and contact patterns, because printing pattern defects are caused not only by mask defects but also by limitations of lithographic resolution. Third is a small minimum address size which needs to be below 0.005um for memory cell design. Fourth is large reticle size which should be greater than the current 6-inches for multi-die reticles. The fifth and final point is new pellicle material research which is needed for ArF lithography.
引用
收藏
页码:10 / 17
页数:8
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