Single Platform 10G-EPON 10.3-Gbps/1.25-Gbps Dual-Rate CDR with Fast Burst-Mode Lock Time Employing 82.5 GS/s Sampling IC and Bit-Rate Adaptive Decision Logic Circuit

被引:0
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作者
Suzuki, Naoki [1 ]
Nakura, Kenichi [1 ]
Kozaki, Seiji [1 ]
Tagami, Hitoyuki [1 ]
Nogami, Masamichi [1 ]
Nakagawa, Junichi [1 ]
机构
[1] Mitsubishi Electr Corp, Informat Technol R&D Ctr, Kamakura, Kanagawa, Japan
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TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We demonstrate a novel 10G-EPON dual-rate CDR using single 82.5 GS/s sampling IC and dual-rate decision logic that achieves rapid burst-mode lock time of 37 ns at 10.3 Gbps in BER=10(-3) and of 64 ns at 1.25 Gbps in BER=10(-12) via dynamically phase and bit-rate varied optical packets.
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页数:3
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