Development of a built-in Analog-to-Digital Converter for a X-ray Astronomy Detector with the SOI CMOS Technology

被引:0
|
作者
Nakashima, Shinya [1 ]
Ryu, Syukyo G. [1 ]
Tsuru, Takeshi G. [1 ]
Arai, Yasuo [2 ]
Takeda, Ayaki [2 ]
Nakajima, Hiroshi [3 ]
Tsunemi, Hiroshi [3 ]
Doty, John P. [4 ]
Imamura, Toshifumi [5 ]
Ohmoto, Takafumi [5 ]
Maeda, Tomoaki [5 ]
Iwata, Atsushi [5 ]
机构
[1] Kyoto Univ, Grad Sch Sci, Dept Phys, Sakyo Ku, Kitashirakawa Oiwake Cho, Kyoto 6068502, Japan
[2] High Energy Accelerator Org KEK, 1-1 Oho, Tsukuba, Ibaraki 3050801, Japan
[3] Osaka Univ, Grad Sch Sci, Dept Earth & Space Sci, Osaka 5600043, Japan
[4] Noqsi Aerosp Ltd, Colorado Springs, CO 80470 USA
[5] AR Tec Corp, Hiroshima 7390046, Japan
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We have been developing a novel X-ray astronomy detector combined with a CMOS readout circuit on a monolithic chip using the SOI CMOS technology. As a part of the development, we have fabricated a prototype of an analog-to-digital converter (ADC) component aiming for building it into the detector itself. We used the OKI 0.2 mu m CMOS fully depleted Silicon-On-Insulator process. The prototype ADC consists of a pre-amplifier and two delta-sigma (Delta Sigma) modulators. The two modulators process a series of analog input signal alternately to improve the readout speed (similar to 100 kHz), and output the digital bit-stream signal. An external Field Programmable Gate Array works as a decimation filter and converts the bit-stream signal into a 12-bit digital signal. We evaluated the prototype ADC and obtained the first results as follows: the power consumption of 40 mW, the equivalent input noise of similar to 80 mu V rms, and the integral non-linearity of less than 0.8%.
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页码:1201 / 1203
页数:3
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