An Efficient Adaptive High Speed Manipulation Architecture for Fast Variable Padding Frequency Domain Motion Estimation

被引:2
|
作者
Ismail, Yasser [1 ]
Shaaban, Mohsen [1 ]
McNeely, Jason B. [1 ]
Bayoumi, Magdy A. [1 ]
机构
[1] Univ Louisiana Lafayette, Ctr Adv Comp Studies, Lafayette, LA 70504 USA
基金
美国国家科学基金会;
关键词
Adaptive search window size; discrete cosine transform (DCT)-manipulation; DCT phase correlation; fast motion estimation; frequency domain; SEARCH ALGORITHM; VIDEO;
D O I
10.1109/TVLSI.2010.2046686
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Motion estimation (ME) consumes up to 70% of the entire video encoder's computations and is, therefore, the main encoding-time consuming process. Discrete cosine transform (DCT)-based phase correlation along with dynamic padding (DP) are the recently evolved frequency domain ME(FDME) techniques that promise to efficiently reduce the computational complexity of the ME process. DP uses dynamic padding thresholds to select the proper search area size according to a pre-estimated set of motion vectors (MVs). The main drawbacks of using conventional DP in the frequency domain are two-fold. First, the dynamic thresholds need to be estimated in the pixel (IDCT) domain which increases complexity. Second, the mismatched transformed search area is formed from different successive transformed blocks, which would lead to an inaccurate ME if the search area is not manipulated. In this paper, an efficient low complexity algorithm and high speed architecture are proposed to implement an adaptive manipulation unit engine (MUE). The MUE, the main module of the FDME system, adaptively decides the padding size and forges a matched transformed search area from the successive transformed blocks. Additionally, the proposed utilized dynamic thresholds are efficiently estimated in the frequency domain (FD). The MUE architecture is presented with two different design implementations trading off the VLSI design parameters. Implementation and simulation results project that the proposed MUE, when integrated in a whole FDME system, can perform ME for 60 fps of 4CIF video at 172 MHz.
引用
收藏
页码:1239 / 1248
页数:10
相关论文
共 50 条
  • [41] A frequency domain fast wavelet collocation method for high-speed circuit simulation
    Zeng, X
    Huang, S
    Wang, R
    Zhou, D
    2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, 2001, : 79 - 84
  • [42] FPGA-based hardware-efficient architecture for variable block-size motion estimation
    Wang, Rui
    Jiang, Hongxu
    Li, Bo
    Beijing Hangkong Hangtian Daxue Xuebao/Journal of Beijing University of Aeronautics and Astronautics, 2009, 35 (11): : 1339 - 1343
  • [43] Lattice PFBLMS: Fast converging structure for efficient implementation of frequency-domain adaptive filters
    Chan, KS
    Farhang-Boroujeny, B
    SIGNAL PROCESSING, 1999, 78 (01) : 79 - 89
  • [44] Fast variable-size block motion estimation for efficient H.264/AVC encoding
    Tu, YK
    Yang, JF
    Sun, MT
    Tsai, YT
    SIGNAL PROCESSING-IMAGE COMMUNICATION, 2005, 20 (07) : 595 - 623
  • [45] Hardware implementation and validation of the fast variable block size motion estimation architecture for H.264/AVC
    Ben Atitallah, A.
    Arous, S.
    Loukil, H.
    Masmoudi, N.
    AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2012, 66 (08) : 701 - 710
  • [46] HIGH SPEED SAD ARCHITECTURES FOR VARIABLE BLOCK SIZE MOTION ESTIMATION IN HEVC VIDEO CODING
    Nalluri, Purnachand
    Alves, Luis Nero
    Navarro, Antonio
    2014 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING (ICIP), 2014, : 1233 - 1237
  • [47] Fast and high quality temporal transcoding architecture in the DCT domain for adaptive video content delivery
    Chander, Vinay
    Reddy, Aravind
    Gaurav, Shriprakash
    Khanwalkar, Nishant
    Kakhani, Manish
    Tapaswi, Shashikala
    2009 INTERNATIONAL CONFERENCE ON COMPUTER ENGINEERING AND TECHNOLOGY, VOL I, PROCEEDINGS, 2009, : 91 - 97
  • [48] Radar detection and fast motion parameter estimation for complex manoeuvering targets at high speed and acceleration
    Gao, Xuanhao
    Zhang, Hongmin
    Dang, Tongxin
    IET RADAR SONAR AND NAVIGATION, 2022, 16 (12): : 1977 - 1996
  • [49] A FAST METHOD FOR FREQUENCY AND TIME-DOMAIN SIMULATION OF HIGH-SPEED VLSI INTERCONNECTS
    SANAIE, R
    CHIPROUT, E
    NAKHLA, MS
    ZHANG, QJ
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1994, 42 (12) : 2562 - 2571
  • [50] Fast Jitter Test Solutions of High-speed IO Based on Timing and Frequency Domain
    Lu, Ming
    CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE 2012 (CSTIC 2012), 2012, 44 (01): : 1049 - 1054