Broadband Transimpedance Amplifier TIA in CMOS 0.18μm Technology Using Matching Technique

This paper describes the matching technique to improve the bandwidth of multi-GHz frequency ranges for the transimpedance amplifier (TIA). Different topologies can be used to implement the input matching network. It is shown that by simultaneously using of series input matching topology and T-output matching network, the bandwidth of the TIA can be obviously improved. This methodology is supported by a design example in a 0.18 mu m CMOS technology. Cadence tools simulation results show a -3dB bandwidth of 20GHz with 50fF photodiode capacitance, a transimpedance gain of 52.6dBO, 8.7pA/root Hz input referred noise and group delay less than 3ps. The TIA dissipates 1.3mW from a 1.8V supply voltage.