Electrical Characterization of a High Speed HBM Interface for a Low Cost Interposer

被引：8

作者：

Dittrich, Michael ^{[1
]}

Heinig, Andy ^{[1
]}

Hopsch, Fabian ^{[1
]}

机构：

[1] Fraunhofer IIS EAS, Zeunerstr 38, Dresden, Germany

来源：

2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018) | 2018年

关键词：

based integration; heterogeneous integration; copper pillar; C4; bumps; interconnection; electrical simulation;

D O I：

10.1109/ECTC.2018.00310

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The demand for higher data rates is still ongoing. But the physical laws are limiting the recent approach of using higher and higher speeds. This leads to a switch from very high-speed on a limited number of ports to reduced speed but with much more ports in parallel. One example for doing this is the High-Bandwidth-Memory (HBM). The paper presents the results of a topology evaluation and the simulations results of the HBM interface to and ASIC across a low cost interposer. Furthermore the design process for a silicon interposer using an Assembly Design Kit is presented. Based on the simulation and the developed design process a system with an ASIC and 8 HBM dies assembled on an interposer was built.

引用

页码：2068 / 2073

页数：6

共 50 条

[1] Electrical Transmission Properties of HBM Interface on 2.1-D System in Package using Organic Interposer
Uematsu, Yutaka
Ushifusa, Nobuyuki
Onozeki, Hitoshi
2017 IEEE 67TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2017), 2017, : 1943 - 1949
[2] Electrical Characterization of Bump-less High Speed Channel on Silicon, Organic and Glass Interposer
Lee, Hyunsuk
Kim, Heegon
Kim, Kiyeong
Jung, Daniel H.
Kim, Jonghoon J.
Choi, Sumin
Lim, Jaemin
Kim, Joungho
Kim, Hyungsoo
Park, Kunwoo
2014 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC), 2014, : 850 - 854
[3] Electrical Performance of High Bandwidth Memory (HBM) Interposer Channel in Terabyte/s Bandwidth Graphics Module
Lee, Hyunsuk
Cho, Kyungjun
Kim, Heegon
Choi, Sumin
Lim, Jaemin
Kim, Joungho
2015 INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC 2015), 2015,
[4] Implementation of active interposer for high-speed and low-cost chip level optical interconnects
Mikawa, T
Kinoshita, M
Hiruma, K
Ishitsuka, T
Okabe, M
Hiramatsu, S
Furuyama, H
Matsui, T
Kumai, K
Ibaragi, O
Bonkohara, M
IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, 2003, 9 (02) : 452 - 459
[5] A Novel Low Cost, High Performance and Reliable Silicon Interposer
Yazdani, Farhang
2015 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2015,
[6] Fabrication and characterization of low-cost ultrathin flexible polyimide interposer
Huang, Yu-Jung
Chen, Ming-Kun
Lin, Yi-Lung
Fu, Shen-Li
MICROELECTRONICS RELIABILITY, 2015, 55 (08) : 1248 - 1255
[7] Statistical Analysis and Modeling of a High Bandwidth Memory (HBM) Interposer Channel
Kim, Youngwoo
2020 IEEE MTT-S INTERNATIONAL CONFERENCE ON NUMERICAL ELECTROMAGNETIC AND MULTIPHYSICS MODELING AND OPTIMIZATION (NEMO 2020), 2020,
[8] Active interposer technology for high-speed and low-cost chip-to-chip optical interconnects
Mikawa, T
Ibaragi, O
Bonkohara, M
ACTIVE AND PASSIVE OPTICAL COMPONENTS FOR WDM COMMUNICATIONS II, 2002, 4870 : 430 - 436
[9] Characteristics and Process Stability of Complete Electrical Interconnection Structures for a Low Cost Interposer Technology
Dittrich, Michael
Steinhardt, Alexander
Heinig, Andy
Wojnowski, M.
Pressel, K.
Wolf, J.
2015 IEEE 65TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2015, : 1701 - 1706
[10] Design Optimization of High Bandwidth Memory (HBM) Interposer considering Signal Integrity
Cho, Kyungjun
Lee, Hyunsuk
Kim, Heegon
Choi, Sumin
Kim, Youngwoo
Lim, Jaemin
Kim, Joungho
Kim, Hyungsoo
Kim, Yongju
Kim, Yunsaing
2015 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM, 2015, : 15 - 18

← 1 2 3 4 5 →