A high-performance CMOS CCII

被引：6
|
作者：
Palumbo, G [1 ]
Pennisi, S [1 ]
机构：
[1] Univ Catania, Dipartimento Elettr Elettron & Sistemist, I-95125 Catania, Italy
来源：
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS | 2001年 / 29卷 / 03期
关键词：
D O I：
10.1002/cta.148
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A CMOS second generation Current Conveyor (CCII) is presented which is based on a novel voltage follower with a symmetric two-gain-stage topology. Simulations on a 0.8 mum design employing a 3.3V power supply show a 0.03 per cent low-frequency voltage gain error, a THD better than -70 dB for a 1 Vp-p 100 kHz input signal, and reduced offset. Copyright (C) 2001 John Wiley & Sons, Ltd.
引用
收藏
页码：331 / 336
页数：6
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