Circuit implementation of a four-dimensional topological insulator

被引:7
|
作者
Wang, You [1 ]
Price, Hannah M. [2 ]
Zhang, Baile [1 ,3 ]
Chong, Y. D. [1 ,3 ]
机构
[1] Nanyang Technol Univ, Sch Phys & Math Sci, Div Phys & Appl Phys, Singapore 637371, Singapore
[2] Univ Birmingham, Sch Phys & Astron, Birmingham B15 2TT, W Midlands, England
[3] Nanyang Technol Univ, Ctr Disrupt Photon Technol, Singapore 637371, Singapore
关键词
EDGE STATES;
D O I
10.1038/s41467-020-15940-3
中图分类号
O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];
学科分类号
07 ; 0710 ; 09 ;
摘要
The classification of topological insulators predicts the existence of high-dimensional topological phases that cannot occur in real materials, as these are limited to three or fewer spatial dimensions. We use electric circuits to experimentally implement a four-dimensional (4D) topological lattice. The lattice dimensionality is established by circuit connections, and not by mapping to a lower-dimensional system. On the lattice's three-dimensional surface, we observe topological surface states that are associated with a nonzero second Chern number but vanishing first Chern numbers. The 4D lattice belongs to symmetry class AI, which refers to time-reversal-invariant and spinless systems with no special spatial symmetry. Class AI is topologically trivial in one to three spatial dimensions, so 4D is the lowest possible dimension for achieving a topological insulator in this class. This work paves the way to the use of electric circuits for exploring high-dimensional topological models. Higher-dimensional topological phases are predicted but cannot be realised in real materials as they are limited to three or fewer dimensions. Here, Wang et al. realise a four-dimensional topological insulator associated with a nonzero second Chern number using electric circuits.
引用
收藏
页数:7
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