Value locality based storage compression memory architecture for ECG sensor node

被引:0
|
作者
Zhao, Chaojun [1 ]
Chen, Chen [2 ]
Chen, Zhijian [1 ]
Meng, Jianyi [2 ]
机构
[1] Zhejiang Univ, Inst VLSI Design, Hangzhou 310027, Zhejiang, Peoples R China
[2] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
关键词
ECG R peak detection; wavelet transform; memory compression; low power; memory architecture; DETECTION PROCESSOR; SIGNAL;
D O I
10.1007/s11432-015-5371-1
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper proposes a value compression memory architecture for QRS detection in ultra-low-power ECG sensor nodes. Based on the exploration of value spatial locality in the most critical preprocessing stage of the ECG algorithm, a cost efficient compression strategy, which reorganizes several adjacent sample values into a base value with several displacements, is proposed. The displacements will be half or quarter scale quantifications; as a result, the storage size is reduced. The memory architecture saves memory space by storing compressed data with value spatial locality into a compressed memory section and by using a small, uncompressed memory section as backup to store the uncompressed data when a value spatial locality miss occurs. Furthermore, a low-power accession strategy is proposed to achieve low-power accession. An embodiment of the proposed memory architecture has been evaluated using the MIT/BIH database, the proposed memory architecture and a low-power accession strategy to achieve memory space savings of 32.5% and to achieve a 68.1% power reduction with a negligible performance reduction of 0.2%.
引用
收藏
页数:11
相关论文
共 50 条
  • [31] Distributed energy storage node controller and control strategy based on energy storage cloud platform architecture
    Tao Yan
    Jialiang Liu
    Qianqian Niu
    Jizhong Chen
    Shaohua Xu
    Meng Niu
    Jerry Y.S.Lin
    GlobalEnergyInterconnection, 2020, 3 (02) : 166 - 174
  • [32] Algorithmic Based VLSI Architecture of Integrated Image Compression for CMOS Image Sensor
    P. Ezhilarasi
    P. Nirmalkumar
    National Academy Science Letters, 2015, 38 : 49 - 59
  • [33] Algorithmic Based VLSI Architecture of Integrated Image Compression for CMOS Image Sensor
    Ezhilarasi, P.
    Nirmalkumar, P.
    NATIONAL ACADEMY SCIENCE LETTERS-INDIA, 2015, 38 (01): : 49 - 59
  • [34] VLSI architecture of lossless ECG compression design based on fuzzy decision and optimisation method for wearable devices
    Chen, Shih-Lun
    Tuan, Min-Chun
    Chi, Tsun-Kuang
    Lin, Tin-Lan
    ELECTRONICS LETTERS, 2015, 51 (18) : 1409 - 1411
  • [35] Efficiency of temporal sensor data compression methods to reduce LoRa-based sensor node energy consumption
    Vaananen, Olli
    Hamalainen, Timo
    SENSOR REVIEW, 2022, 42 (05) : 503 - 516
  • [36] Secure encryption algorithms for wireless sensor networks based on node trust value
    Li, Li
    INTERNATIONAL JOURNAL OF INTERNET PROTOCOL TECHNOLOGY, 2020, 13 (03) : 117 - 123
  • [37] A Study on Family Medical Sensor Networks and ECG and Temperature Monitoring Node based on 6LoWPAN
    Fu, Wei
    Shui, Meng Ling
    Wang, Ping
    ADVANCED MANUFACTURING TECHNOLOGY, PTS 1-4, 2012, 472-475 : 3445 - 3449
  • [38] Design of Memory Shifting System Based on Dual-Space Storage Architecture
    Wang, Zhehe
    Li, Shuang
    Jiang, Jiabao
    Wang, Chunteng
    Wang, Xianchao
    Zhu, Taiyu
    IEEE ACCESS, 2022, 10 : 91897 - 91905
  • [39] A Cognitive Model Based Framework and Multi layer Storage Architecture for Associative Memory
    Li, Jiandong
    Huang, Runhe
    Wang, Kevin I. -Kai
    PROCEEDINGS OF 2020 IEEE 19TH INTERNATIONAL CONFERENCE ON COGNITIVE INFORMATICS & COGNITIVE COMPUTING (ICCI*CC 2020), 2020, : 195 - 201
  • [40] A Gate Multiplexing Architecture-Based Artificial Visual Sensor and Memory System
    Liao, Cen
    Wang, Wei
    Sun, Yi
    Wang, Yongzhou
    Liu, Sen
    Tong, Peiwen
    Li, Qingjiang
    ADVANCED INTELLIGENT SYSTEMS, 2023, 5 (01)