Value locality based storage compression memory architecture for ECG sensor node

被引:0
|
作者
Zhao, Chaojun [1 ]
Chen, Chen [2 ]
Chen, Zhijian [1 ]
Meng, Jianyi [2 ]
机构
[1] Zhejiang Univ, Inst VLSI Design, Hangzhou 310027, Zhejiang, Peoples R China
[2] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
关键词
ECG R peak detection; wavelet transform; memory compression; low power; memory architecture; DETECTION PROCESSOR; SIGNAL;
D O I
10.1007/s11432-015-5371-1
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper proposes a value compression memory architecture for QRS detection in ultra-low-power ECG sensor nodes. Based on the exploration of value spatial locality in the most critical preprocessing stage of the ECG algorithm, a cost efficient compression strategy, which reorganizes several adjacent sample values into a base value with several displacements, is proposed. The displacements will be half or quarter scale quantifications; as a result, the storage size is reduced. The memory architecture saves memory space by storing compressed data with value spatial locality into a compressed memory section and by using a small, uncompressed memory section as backup to store the uncompressed data when a value spatial locality miss occurs. Furthermore, a low-power accession strategy is proposed to achieve low-power accession. An embodiment of the proposed memory architecture has been evaluated using the MIT/BIH database, the proposed memory architecture and a low-power accession strategy to achieve memory space savings of 32.5% and to achieve a 68.1% power reduction with a negligible performance reduction of 0.2%.
引用
收藏
页数:11
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