The analytical model of frequency response and bandwidth for coupled multilayer graphene nanoribbon interconnects

被引:4
|
作者
Xu, Peng [1 ]
Pan, Zhongliang [1 ]
机构
[1] South China Normal Univ, Sch Phys & Telecommun Engn, Guangzhou 510006, Peoples R China
来源
MICROELECTRONICS JOURNAL | 2020年 / 100卷
基金
中国国家自然科学基金;
关键词
MLGNR interconnects; Cu interconnects; On-chip interconnects; 3-dB bandwidth; Transfer gain; TC-MLGNR; PERFORMANCE ANALYSIS; MLGNR INTERCONNECTS; SWCNT INTERCONNECTS; CROSSTALK ANALYSIS; PROSPECTS; DELAY;
D O I
10.1016/j.mejo.2020.104780
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper applies the multilayer graphene nanoribbons (MLGNR) as a prospective candidate material to replace the conventional copper (Cu) for next generation on-chip interconnects. Based on the equivalent single conductor (ESC) modeling, a distributed transmission line model for coupled MLGNR interconnects is presented to obtain the transfer gain and 3-dB bandwidth at the global level of 14 nm technology node, which take the in-phase and out-of-phase crosstalk modes into consideration, and verified with the Hspice simulation. It is demonstrated that the MLGNR and Cu interconnects under in-phase mode have a larger transfer gain and a wider 3-dB bandwidth than that under out-of-phase mode, and MLGNR interconnects can more effectively improve the transfer gain and 3-dB bandwidth compared with Cu interconnects at the same conditions. The numerical calculation results show that, decreasing interconnect temperature, increasing line space and increasing driver and load sizes are efficient ways to enhance the transfer gain and 3-dB bandwidth for MLGNR and Cu interconnects. Moreover, the top contact MLGNR (TC-MLGNR) also can be used as an emerging material for on-chip interconnects to replace the conventional Cu. In addition, it is found that the results obtained by the proposed model are in good matching with Hspice simulation and the maximum relative deviation for them is less than 4%, meanwhile the efficiency of CPU runtime is improved over 90% by using the proposed model, as compared to Hspice simulation. The results presented in this paper would be useful to design the on-chip interconnects with better bandwidth characteristics.
引用
收藏
页数:12
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