A feature associative processor for image recognition based on a A-D merged architecture

被引：0
|
作者：
Iwata, A [1 ]
Nagata, M [1 ]
Nakamoto, H [1 ]
Takeda, N [1 ]
Homma, M [1 ]
Higashi, H [1 ]
Morie, T [1 ]
机构：
[1] Hiroshima Univ, Fac Elect Engn, Higashihiroshima 7398527, Japan
来源：
VLSI: SYSTEMS ON A CHIP | 2000年 / 34卷
关键词：
CMOS image sensor; pulse width modulation; vector quantization; pattern matching; cellular automata;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
An Image Feature Associative Processor (IFAP), which extracts local and grobal features of input image data based on bio-inspired parallel architecture, is proposed. It consists of an image sensor, a cellular automaton and pattern matching processors based on PWM analog-digital merged circuits. IFAP extracts image features at a standard video frame rate with low power dissipation.
引用
收藏
页码：77 / 88
页数：12
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