Chip-package co-design of power distribution network for system-in-package applications

被引：2
|
作者：
Kim, GW [1 ]
Kam, DG [1 ]
Chung, DH [1 ]
Kim, JH [1 ]
机构：
[1] Korea Adv Inst Sci & Technol, Dept EECS, Terahertz Interconnect & Package Lab, Taejon 305701, South Korea
来源：
6TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, PROCEEDINGS (EPTC 2004) | 2004年
关键词：
D O I：
10.1109/EPTC.2004.1396659
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
A new figure of merit for chip-package co-design of a power distribution network (PDN) is needed, not merely a voltage difference between power and ground at each hierarchy. In order to measure power supply noise as it is actually seen by the circuits in various locations on a chip, we need to chase the power/ground voltage with reference to a system ground. A PDN has two current paths; a series path and a shunt path. While the shunt path determines the voltage difference, the series path controls the power/ground voltage itself. Therefore, a balnaced approach is strongly required rather than an excessive attention to the shunt path.
引用
收藏
页码：499 / 501
页数：3
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