Design Space Exploration Applied to Security

被引:0
|
作者
Linares, Antoine [1 ,2 ,3 ]
Hely, David [2 ]
Lhermet, Frank [1 ]
Di Natale, Giorgio [3 ]
机构
[1] SiF France, F-13600 La Ciotat, France
[2] Univ Grenoble Alpes, Grenoble INP, CNRS, LCIS, F-26000 Valence, France
[3] Univ Grenoble Alpes, Grenoble INP, CNRS, TIMA, F-38000 Grenoble, France
关键词
D O I
10.1109/DTIS53253.2021.9505151
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Software Hardening against memory safety exploits can be achieved from the silicon, up to the software, with both compilers and operating systems features. Unfortunately, due to the growing evolution of attacks, security architects have no guarantees, at an early stage of the development, that defenses will match the security needs and overcome the targeted threats. In addition, after product release, it is difficult to evaluate the architecture performance against new threats. This paper presents a dynamic analysis technique that allows the evaluation of the security profile of a given architecture during design exploration. The method is designed to highlight and quantify the security threats covered by the countermeasures embedded at any level of a given architecture. The provided results will help for protection evaluation, classification, and architecture choices. The method comes with a tool that implements this approach and has been applied to several architectures. This tool helps to classify architecture along with its alternatives thanks to metrics.
引用
收藏
页数:4
相关论文
共 50 条
  • [21] Performance Models for Heterogeneous Systems Applied to the Dark Silicon-aware Design Space Exploration
    dos Santos, Mateus T.
    Sonohata, Rhayssa
    Krebs, Casio
    Segovia, Diego
    Santos, Ricardo
    Duenha, Liana
    2019 31ST INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD 2019), 2019, : 9 - 16
  • [22] A Design-Space Exploration for Allocating Security Tasks in Multicore Real-Time Systems
    Hasan, Monowar
    Mohan, Sibin
    Pellizzoni, Rodolfo
    Bobba, Rakesh B.
    PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2018, : 225 - 230
  • [23] Formulation of Design Space Exploration Problems by Composable Design Space Identification
    Jordao, Rodolfo
    Sander, Ingo
    Becker, Matthias
    PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021), 2021, : 1204 - 1207
  • [24] IDeSyDe: Systematic Design Space Exploration via Design Space Identification
    Jordao, Rodolfo
    Becker, Matthias
    Sander, Ingo
    ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2024, 29 (05)
  • [25] ARCHEXPLORER FOR AUTOMATIC DESIGN SPACE EXPLORATION
    Desmet, Veerle
    Girbal, Sylvain
    Ramirez, Alex
    Vega, Augusto
    Temam, Olivier
    IEEE MICRO, 2010, 30 (05) : 5 - 15
  • [26] Fast exploration of ΔΣADC design space
    Bajdechi, O
    Huijsing, JH
    Gielen, G
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGS, 2002, : 49 - 52
  • [27] Hypermedia processors: Design space exploration
    Kin, J
    Lee, CH
    Mangione-Smith, WH
    Potkonjak, M
    1998 IEEE SECOND WORKSHOP ON MULTIMEDIA SIGNAL PROCESSING, 1998, : 323 - 328
  • [28] Design Space Exploration of FinFET Cache
    Tang, Aoxiang
    Jha, Niraj K.
    ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 2013, 9 (03)
  • [29] An Approach for Effective Design Space Exploration
    Kang, Eunsuk
    Jackson, Ethan
    Schulte, Wolfram
    FOUNDATIONS OF COMPUTER SOFTWARE: MODELING, DEVELOPMENT, AND VERIFICATION OF ADAPTIVE SYSTEMS, 2011, 6662 : 33 - 54
  • [30] FPU Generator for Design Space Exploration
    Galal, Sameh
    Shacham, Ofer
    Brunhaver, John S., II
    Pu, Jing
    Vassiliev, Artem
    Horowitz, Mark
    2013 21ST IEEE SYMPOSIUM ON COMPUTER ARITHMETIC (ARITH), 2013, : 25 - 34