Nyquist-Rate Time-Interleaved Current-Steering DAC with Dynamic Channel Matching

被引：0
|
作者：
Cheng, Long [1 ]
Ye, Fan [1 ]
Yang, Hai-Feng [1 ]
Li, Ning [1 ]
Xu, Jun [1 ]
Ren, Jun-Yan [1 ]
机构：
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
来源：
2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2011年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A Nyquist-rate time-interleaved current-steering digital-to-analog converter (DAC) with dynamic channel matching (DCM) is proposed. Thanks to the proposed Nyquist-rate time-interleaved architecture, the DAC can properly operate at more than 1GS/s for a near-Nyquist output signal. The key limitation of the time-interleaved architecture is the mismatches between channels. The proposed DCM method can be applied to significantly suppress the spurious tones caused by imperfect channel matching. A 14-bit 1GS/s current-steering DAC with behavior models and a 0.18 mu m CMOS technology is simulated to illustrate the wideband time-interleaved architecture and the harmonic elimination of the DCM.
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页码：5 / 8
页数：4
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