Investigation of step-doped channel heterostructure field-effect transistor

被引：3

作者：

Laih, LW ^{[1
]}

Tsai, JH ^{[1
]}

Wu, CZ ^{[1
]}

Cheng, SY ^{[1
]}

Liu, WC ^{[1
]}

机构：

[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan

来源：

IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 1997年 / 144卷 / 05期

关键词：

HFETs; doped-channel FETs;

D O I：

10.1049/ip-cds:19971479

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile has been fabricated and demonstrated. The SDCFET studied provides the advantages of high current density, high breakdown voltage, wide gate voltage swing for high transconductance, and adjustable threshold voltage. A simple model is employed to analyse the performance of threshold voltage. For comparison two kinds of SDCFETs have been fabricated. For the 1 x 100 mu m(2) gated dimension, maximum drain saturation currents of 735 and 675 mA/mm, maximum transconductances of 200 and 232 mS/mm, gate breakdown voltages of 15 and 12 V. wide gate voltage swing of 3.3 and 2.6 V with transconductance g(m) higher than 150 mS/mm, mm, and threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performance figures show the SDCFET has good potential for high-speed, high-power circuit applications.

引用

页码：309 / 312

页数：4

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