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- [41] Board level reliability of various stacked die chip scale package configurations 2003 INTERNATIONAL SYMPOSIUM ON MICROELECTRONICS, 2003, 5288 : 894 - 899
- [42] Hygro-thermal Finite Element Analysis of Green Stacked Die Package 32ND IEEE/CPMT INTERNATIONAL ELECTRONIC MANUFACTURING TECHNOLOGY SYMPOSIUM, 2007, : 57 - +
- [43] Stress analysis of spacer paste replacing dummy die in a stacked CSP package FIFTH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, PROCEEDINGS, 2003, : 82 - 85
- [45] Design and development of stacked die technology solutions for memory packages PROCEEDINGS OF THE 7TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS. 1 AND 2, 2005, : 23 - 28
- [46] A Software-managed Approach to Die-stacked DRAM 2015 INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURE AND COMPILATION (PACT), 2015, : 188 - 200
- [47] New developments in stacked die CSPs PROCEEDINGS OF THE SIXTH IEEE CPMT CONFERENCE ON HIGH DENSITY MICROSYSTEM DESIGN AND PACKAGING AND COMPONENT FAILURE ANALYSIS (HDP'04), 2004, : 29 - 30
- [48] Thermal issues in stacked die packages Twenty-First Annual IEEE Semiconductor Thermal Measurement and Management Symposium, Proceedings 2005, 2005, : 307 - 312
- [49] Developments and trends in stacked die CSPs FIFTH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, PROCEEDINGS, 2003, : 145 - 146
- [50] Effects of Different Die and Epoxy Thickness to the QFN Package FRACTURE AND STRENGTH OF SOLIDS VII, PTS 1 AND 2, 2011, 462-463 : 943 - 948