Parallel Algorithm on Graphics Processing Unit for Harmonic Minimization in Multilevel Inverters

被引：11

作者：

Roberge, Vincent ^{[1
]}

Tarbouchi, Mohammed ^{[1
]}

Labonte, Gilles ^{[2
]}

机构：

[1] Royal Mil Coll Canada, Dept Elect & Comp Engn, Kingston, ON K7K7L6, Canada

[2] Royal Mil Coll Canada, Dept Math & Comp Sci, Kingston, ON K7K7L6, Canada

来源：

IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS | 2015年 / 11卷 / 03期

关键词：

Graphics processing unit (GPU); harmonic minimization; multilevel inverter; parallel algorithm; MINIMIZING THD;

D O I：

10.1109/TII.2015.2426057

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents the implementation details of a parallel algorithm on graphics processing units (GPUs) to compute the optimal switching angles for the harmonic minimization in multilevel inverters with unequal dc voltage sources. Two algorithms, the Newton- Raphson method and the bisection method, and three different parallel implementations are investigated. Both algorithms considered have a low time complexity and offer a superior converging rate allowing for the real- time control of inverters with a very large number of levels. By exploiting the massively parallel architecture of GPUs, the execution time of the program is reduced significantly. The proposed parallel implementation offers a maximum speedup of 534x compared with a sequential execution on CPU, and allows for the calculation of the optimal switching angles for inverters with up to 1000 dc sources in less than 16.4 mu s.

引用

页码：700 / 707

页数：8

共 50 条

[21] Collaborative Parallel Hybrid Metaheuristics on Graphics Processing Unit
Roberge, Vincent
Tarbouchi, Mohammed
Okou, Francis
INTERNATIONAL JOURNAL OF COMPUTATIONAL INTELLIGENCE AND APPLICATIONS, 2015, 14 (01)
[22] Parallel Implementation of Segmentation Algorithms on Graphics Processing Unit
Yenialp, Erdal
Kalkan, Habil
2013 21ST SIGNAL PROCESSING AND COMMUNICATIONS APPLICATIONS CONFERENCE (SIU), 2013,
[23] Selective Harmonics Minimization for Multilevel Inverters
El-Bakry, M.
SECOND INTERNATIONAL CONFERENCE ON COMPUTER AND ELECTRICAL ENGINEERING, VOL 2, PROCEEDINGS, 2009, : 341 - 346
[24] Minimization of Power Loss and Harmonic Distortion in Grid-Tied Cascaded Multilevel Inverters
Fateh, Fariba
Gruenbacher, Don
2014 TWENTY-NINTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC), 2014, : 3490 - 3495
[25] Harmonic Elimination of Multilevel Inverters by Moth-Flame Optimization Algorithm
Ceylan, Oguzhan
2016 INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS (INDEL), 2016,
[26] Efficient parallel algorithm for detecting influential nodes in large biological networks on the Graphics Processing Unit
Xiao, Lei
Wang, Shuangyan
Mei, Gang
FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE, 2020, 106 : 1 - 13
[27] Selective Harmonic Elimination in Multilevel Inverters Using Gravitational Search Algorithm
Kala, Peeyush
Arora, Sudha
2017 6TH INTERNATIONAL CONFERENCE ON COMPUTER APPLICATIONS IN ELECTRICAL ENGINEERING - RECENT ADVANCES (CERA), 2017, : 545 - 550
[28] Exchange Market Algorithm for Selective Harmonic Elimination in Cascaded Multilevel Inverters
MohammadHassani, Ardavan
Babaei, Ebrahim
13TH INTERNATIONAL CONFERENCE ON THEORY AND APPLICATION OF FUZZY SYSTEMS AND SOFT COMPUTING - ICAFS-2018, 2019, 896 : 594 - 601
[29] Parallel Algorithm on Multicore Processor and Graphics Processing Unit for the Optimization of Electric Vehicle Recharge Scheduling
Roberge, Vincent
Brooks, Katerina
Tarbouchi, Mohammed
ELECTRONICS, 2024, 13 (09)
[30] Selective Harmonic Elimination in Multilevel Inverters Using the Bonobo Optimization Algorithm
Taha, Taha A.
Wahab, Noor Izzri Abdul
Hassan, Mohd Khair
Zaynal, Hussein, I
FORTHCOMING NETWORKS AND SUSTAINABILITY IN THE AIOT ERA, VOL 1, FONES-AIOT 2024, 2024, 1035 : 304 - 321

← 1 2 3 4 5 →