Algorithm to extract two-node bridges

被引：12

作者：

Zachariah, ST ^{[1
]}

Chakravarty, S ^{[1
]}

机构：

[1] Intel Corp, Design Technol, Santa Clara, CA 95052 USA

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2003年 / 11卷 / 04期

关键词：

bridge; defects; extraction; layout analysis;

D O I：

10.1109/TVLSI.2003.816141

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Current bridge fault extraction techniques are limited by performance and capacity constraints. In this paper, we present a fast and accurate algorithm to extract and rank two-node bridges based on the computation of their weighted critical area. Experimental results showing the algorithm's performance are presented.

引用

页码：741 / 744

页数：4

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