A Multi-Channel Front-End ASIC for Pixellated Detectors

A 16-channel front-end ASIC is designed for pixellated detectors. It consists of a charge-sensitive-preamplifier(CSA), a CR-(RC)(2) shaper and a class-AB buffer for each channel. A novel continuous reset scheme for low noise and large linear range is presented. The equivalent feedback resistance can be digitally programmed by 3 decades. The shaper output width can also be adjusted from 1 mu s to 10 mu s, allowing it to be used both for low noise and high counting rate applications. The chip is implemented in 0.6 mu m CMOS process. The ENC is measured to be 1413e+20e/pF @ 1 mu s pulse width and 1402e+11e/pF @ 10 mu s pulse width respectively. The large zero-capacitance ENC is dominant by the FETs used as resistors in the shaper. The nonlinearity is less than 1.1% over an input charge range of 0-28fC using 0.1pF feedback capacitor.