Low Noise, High PSRR, High-Order Piecewise Curvature Compensated CMOS Bandgap Reference

A Bandgap reference (BGR) circuit with a new high-order curvature-compensation technique is proposed in this paper. The curvature method operates by adding up two correction voltages. The first one is proportional to the difference in gate-source voltages of two MOS transistors (Delta V-GS) operating in weak inversion mode, while the second one (V-NL) is generated using a nonlinear current created by a piecewise-linear circuit. To improve the power supply rejection ratio (PSRR) and the line regulation performance, a low-power pre-regulator isolates the circuit power supply and BGR output. Additionally, the chopping technique reduces the output voltage noise and offset. Consequently, the overall PVT robustness of the proposed circuit is significantly improved. The circuit was implemented using a thick-oxide transistor in a standard 0.18 mu m CMOS technology with a 3.3 V power supply voltage. The silicon results exhibit a temperature coefficient of 5-15 ppm/degrees C in the temperature range of -10 degrees C to 110 degrees C, whereas the simulated results demonstrate a similar performance within the temperature range of -40 degrees C to 150 degrees C. The supply current consumption is 150 mu A, and the chip area is 0.56 x 0.8 mm(2). The measured peak noise at the output is 1.42 mu V/root Hz @320 Hz, the measured PSRR @ 1 kHz is -80 dB, and the line regulation performance is 10 ppm/V, making the proposed circuit suitable for applications requiring low noise, high-order temperature compensation, and robust PVT performance.