Embedded low complexity JPEG2000 videocoding system

被引：1
|
作者：
Schuchter, Arthur [1 ]
Uhl, Andreas [1 ]
机构：
[1] Salzburg Univ, Dept Comp Sci, A-5020 Salzburg, Austria
来源：
2007 IEEE/ACM/IFIP WORKSHOP ON EMBEDDED SYSTEMS FOR REAL-TIME MULTIMEDIA | 2007年
关键词：
D O I：
10.1109/ESTMED.2007.4375807
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we discuss an embedded hardware low complexity JPEG2000 video coding system. The hardware implementation is based on a software simulation system, where temporal redundancy is exploited by coding of differential frames which are arranged in an adaptive GOP structure. The hardware used mainly consists of a microprocessor (Analog Devices ADSP-BF533 Blackfin Processor) and a JPEG2000 chip (ADV202). DMAs (Direct Memory Access) are introduced to optimize memory transfers in the system. It is shown that Memory to Memory DMAs lead to significant improvement in our proposed memory structure resulting in better performance.
引用
收藏
页码：77 / 82
页数：6
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