Fine-Pitch Capabilities of the Flat Ultra-Thin Chip Packaging (UTCP) Technology

被引:12
|
作者
Govaerts, Jonathan [1 ,2 ]
Bosman, Erwin [1 ,2 ]
Christiaens, Wim [1 ,2 ]
Vanfleteren, Jan [1 ,2 ]
机构
[1] IMEC, Ctr Microsyst Technol CMST, B-3001 Louvain, Belgium
[2] Univ Ghent, Dept Elect & Informat Syst ELIS, B-9000 Ghent, Belgium
来源
关键词
Chip embedding; fine-pitch interconnection; flexible polyimide substrates; thin chip packaging;
D O I
10.1109/TADVP.2009.2018134
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper describes the fine-pitch interconnection capabilities of the ultra-thin chip packaging (UTCP) technology, a technology under development for embedding thin chips in a flexible polyimide (PI) substrate. It allows for fully flexible electronics, as the rigid chips are thinned down to 20-30 mu m, at which point they become truly flexible themselves. This way, instead of just a flexible substrate with rigid components assembled on top, the entire circuitry can be incorporated inside a 30-40 mu m thin chip package. The paper briefly introduces the technology's background with a short description of the fabrication process. Building on the developments already achieved, some further optimizations are discussed, and the technology is tested for its fine-pitch interconnection capabilities using test chips with four-point probe and daisy chain patterns, with a pitch down to 40 mu m. The possibility to package several chips in the same substrate is investigated, as well, and finally an outlook on future experiments is briefly discussed.
引用
收藏
页码:72 / 78
页数:7
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