High Speed Polar Encoder Architecture For next Generation 5G Applications Using Radix-k Processing Engine

被引：0
|
作者：
Kavipriya, R. [1 ]
Maheswari, M. [1 ]
机构：
[1] K Ramakrishnan Coll Engn, Dept ECE, Trichy, India
来源：
2019 INTERNATIONAL CONFERENCE ON COMPUTER COMMUNICATION AND INFORMATICS (ICCCI - 2019) | 2019年
关键词：
Polar Encoder; Polar Codes; High Speed; CODES;
D O I：
10.1109/iccci.2019.8821961
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Among the various encoding techniques which is effective, polar encoding is found to be the best because of its unique characteristics of channel achieving property. The coding scheme chosen by Third Generation Partnership Project (3GPP) is polar code since it has attracted the attention towards the 5th generation wireless system. The emerging research is going on the polar codes in the application of MIMO system. Polar encoder is mainly designed because of its high processing speed as compared with other techniques. The VLSI implementation process can be extended to a large extent by using radix-k based design.
引用
收藏
页数：4
相关论文
共 50 条
  • [1] High-Speed Polar Decoder Architecture for Next Generation 5G Applications Using Radix-k Processing Engine
    Kavipriya, R.
    Maheswari, M.
    INVENTIVE COMMUNICATION AND COMPUTATIONAL TECHNOLOGIES, ICICCT 2019, 2020, 89 : 1119 - 1125
  • [2] VLSI Design of An Ultra-High-Speed Polar Encoder Architecture Using 16-Parallel Radix-2 Processing Engines for Next-Generation 5G Applications
    Shih, Xin-Yu
    Huang, Po-Chun
    2017 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - TAIWAN (ICCE-TW), 2017,
  • [3] High-Speed Low-Area-Cost VLSI Design of Polar Codes Encoder Architecture Using Radix-k Processing Engines
    Shih, Xin-Yu
    Huang, Po-Chun
    Chen, Yu-Chun
    2016 IEEE 5TH GLOBAL CONFERENCE ON CONSUMER ELECTRONICS, 2016,
  • [4] VLSI design and implementation of a reconfigurable hardware-friendly Polar encoder architecture for emerging high-speed 5G system
    Shih, Xin-Yu
    Huang, Po-Chun
    Chou, Hong-Ru
    INTEGRATION-THE VLSI JOURNAL, 2018, 62 : 292 - 300
  • [5] Silicon Technologies for Next Generation 5G Architectures and Applications
    Janardhanan, Shankaran
    2019 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA), 2019,
  • [6] Silicon Technologies for Next Generation 5G Architectures and Applications
    Janardhanan, Shankaran
    2019 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), 2019,
  • [7] A Potential Architecture and Next Generation Technologies for 5G Wireless Networks
    Aydemir, Murat
    Cengiz, Korhan
    2016 24TH SIGNAL PROCESSING AND COMMUNICATION APPLICATION CONFERENCE (SIU), 2016, : 277 - 280
  • [8] High Speed VLSI Architecture Design Using FFT for 5G Communications
    Devi, P. Lakshmi
    Malipatil, Somashekhar
    Surekha, P. S.
    INVENTIVE COMPUTATION AND INFORMATION TECHNOLOGIES, ICICIT 2021, 2022, 336 : 297 - 304
  • [9] Next generation of microservices for the 5G Service-Based Architecture
    Moreira, Joao Bourbon
    Mamede, Henrique
    Pereira, Vasco
    Sousa, Bruno
    INTERNATIONAL JOURNAL OF NETWORK MANAGEMENT, 2020, 30 (06)
  • [10] High Frequency and High Speed Connector Design for 5G Applications
    Hsu, Rung-Bin
    Huang, Yu-Cheng
    Lee, Chia-Che
    Hsieh, Ming-Hao
    Yang, Chang-Fa
    Chao, Chen-Pang
    Chen, Shih-Chieh
    Kung, Jaisy
    Wei, George
    Su, Hou-An
    Hsu, Hung-Wei
    2021 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT), 2021,
12345