A compact and accurate FPGA based nonisotropic fading channel simulator

A novel design and implementation technique for generating Rayleigh fading variates is presented in this paper. An FPGA implementation of the new baseband fading simulator utilizes only 6.8% of the configurable slices and generates 10 million statistically accurate samples per second. Increasing the output sample rate to up to 300 million samples per second is possible with a slight increase in the resource utilization. A wide variety of channel characteristics and sample rates can be achieved with parameterizing the new baseband channel simulator.