A Case for Efficient Accelerator Design Space Exploration via Bayesian Optimization

被引:0
|
作者
Reagen, Brandon [1 ]
Hernandez-Lobato, Jose Miguel [2 ]
Adolf, Robert [1 ]
Gelbart, Michael [3 ]
Whatmough, Paul [1 ,4 ]
Wei, Gu-Yeon [1 ]
Brooks, David [1 ]
机构
[1] Harvard Univ, Cambridge, MA 02138 USA
[2] Univ Cambridge, Cambridge, England
[3] Univ British Columbia, Vancouver, BC, Canada
[4] ARM Res, Cambridge, England
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper we propose using machine learning to improve the design of deep neural network hardware accelerators. We show how to adapt multi-objective Bayesian optimization to overcome a challenging design problem: optimizing deep neural network hardware accelerators for both accuracy and energy efficiency. DNN accelerators exhibit all aspects of a challenging optimization space: the landscape is rough, evaluating designs is expensive, the objectives compete with each other, and both design spaces (algorithmic and microarchitectural) are unwieldy. With multi-objective Bayesian optimization, the design space exploration is made tractable and the design points found vastly outperform traditional methods across all metrics of interest.
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页数:6
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