Design and Implementation of a Time to Digital Convertor Circuit Based on Field-Programmable-Gate-Array in Positioning System

被引：0

作者：

Zhang, Feng ^{[1
]}

Zhang, Chun ^{[1
]}

Jia, Xupeng ^{[1
]}

Zhang, Yu ^{[1
]}

机构：

[1] Tsinghua Univ, Inst Microelect, IC & Syst Design Res Div, Beijing 100084, Peoples R China

来源：

2014 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2014年

关键词：

time interval measurement; Field-Programmable-Gate-Array(FPGA}; time-to-digital conversion (TDC); delay line;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a high accuracy time interval measurement system based on Field-Programmable-Gate-Array (FPGA) is presented. The system proposes delay line with time interpolation method to implement time-to-digital conversion. Coarse-time-measurement combined with fine-time-measurement is the cardinal principle of this design. Gray code counter produces the coarse time part, while the fine time part is measured by the delay line, which is based on the dedicated carry lines in the FPGA. On the one hand, it gives the design of coarse and fine time part module. On the other hand, it proves test results, followed by the analysis. The system operating frequency is 100MHz. Simulations have been done to verify the resolution at a level of ten picoseconds. The actual measurement results show that the time interval measurement deviation is less than 200ps, which meets the demand of positioning.

引用

页数：2

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