New Compact Modeling Solutions for Organic and Amorphous Oxide TFTs

被引:7
|
作者
Iniguez, Benjamin [1 ,2 ]
Nathan, Arokia [2 ]
Kloes, Alexander [3 ]
Bonnassieux, Yvan [4 ]
Romanjek, Krunoslav [5 ]
Charbonneau, Micael [5 ]
Van der Steen, Jan Laurens [6 ]
Gelinck, Gerwin [6 ]
Gneiting, Thomas [7 ]
Mohamed, Firas [8 ]
Ghibaudo, Gerard [9 ]
Cerdeira, Antonio [10 ]
Estrada, Magali [10 ]
Mijalkovic, Slobodan [11 ]
Nejim, Ahmed [11 ]
机构
[1] Univ Rovirail Virgili, Dept Elect Engn, Tarragona 43007, Spain
[2] Univ Cambridge, Dept Engn, Cambridge CB3 0FA, England
[3] Univ Appl Sci, Compentence Ctr Nanoelect & Photon, TH Mittelhessen, D-35390 Giessen, Germany
[4] Ecole Polytech, LPCM, Phys Dept, F-91120 Palaiseau, France
[5] CEA Liten, F-38000 Grenoble, France
[6] TNO, Holst Ctr, NL-5605 KN Eindhoven, Netherlands
[7] AdMOS GmbH, D-72636 Frickenhausen, Germany
[8] Silvaco France, F-38330 Montbonnot St Martin, France
[9] INP Grenoble, IMEP LAHC, F-38031 Grenoble, France
[10] CINVESTAV, Dept Elect Engn, Mexico City 07360, DF, Mexico
[11] Silvaco Europe Ltd, St Ives PE27 5JL, Cambs, England
基金
欧盟地平线“2020”;
关键词
Integrated circuit modeling; Mathematical model; Organic thin film transistors; Threshold voltage; Computational modeling; Biological system modeling; Capacitance; Thin film transistors; organic thin film transistors; semiconductor device modeling; semiconductor device noise; THIN-FILM TRANSISTORS; FIELD-EFFECT TRANSISTORS; LOW-FREQUENCY NOISE; CHARGE-TRANSPORT; PARAMETER EXTRACTION; VOLTAGE-DEPENDENCE; ANALYTIC MODEL; 1/F NOISE; MOBILITY; CAPACITANCE;
D O I
10.1109/JEDS.2021.3106836
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We review recent compact modeling solutions for Organic and Amorphous Oxide TFTs (OTFTs and AOS TFTs, respectively), which were developed, under the framework of the EU-funded project DOMINO, to address issues specifically connected to the physics of these devices. In particular, using different approaches, analytical equations were formulated to model the Density of States (DOS), different transport mechanisms, trapping/de-trapping, drain current, stress, capacitances, frequency dispersion and noise. The final TFT models were, after implementation in Verilog-A, validated by means of the design and simulation of test circuits.
引用
收藏
页码:911 / 932
页数:22
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