Area-Efficient 2-D Digital Filter Architectures Possessing Diagonal and Four-Fold Rotational Symmetries

被引:0
|
作者
Chen, Pei-Yu [1 ]
Van, Lan-Da [1 ]
Reddy, Hari C. [2 ,3 ]
Khoo, I-Hung [2 ,3 ]
机构
[1] Natl Chiao Tung Univ, Dept Comp Sci, Hsinchu, Taiwan
[2] Calif State Univ Long Beach, Dept Elect Engn, Long Beach, CA 90840 USA
[3] Natl Chiao Tung Univ, Hsinchu, Taiwan
关键词
REALIZATION;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, two area-efficient two-dimensional (2-D) IIR filter architectures for 2-D transfer function with diagonal and four-fold rotational symmetries are proposed for image processing. For this purpose, two different intermediate transfer functions are applied and the corresponding two new filter architectures are obtained. Under satisfactory average error performance, we determine that the new filter structure requires less multiplier wordlength than the previously published Type-1 filter structure. With the features of less numerator multiplier wordlength and shorter critical path, the proposed diagonal and four-fold rotational symmetry filter architectures can result in 10.17% and 3.35% area reduction with respect to the published Type-1 IIR filter structures with diagonal and four-fold rotational symmetries in terms of synthesis results.
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页数:5
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