Disruptive Ultra-Low-Power SOI CMOS Circuits towards μW Medical Sensor Implants

被引：0

作者：

Gosset, Geoffroy ^{[1
]}

Bol, David ^{[1
]}

Pollissard-Quatremere, Guillaume ^{[1
]}

Rue, Bertrand ^{[1
]}

Flandre, Denis ^{[1
]}

机构：

[1] Catholic Univ Louvain, ICTEAM Inst, B-1348 Louvain, Belgium

来源：

2010 IEEE INTERNATIONAL SOI CONFERENCE | 2010年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we propose disruptive circuit design techniques for ultra-low-power (ULP) medical sensor implants. They use unique CMOS blocks to build ULP diodes and transistors that are implemented with ultra-low-Vt devices in 0.15 mu m fully-depleted SOI CMOS, without process modification. Using these techniques, we propose a highly-efficient power-management unit and a 1.1 mu W interface for capacitive sensors.

引用

页数：2

共 50 条

[1] Ultra-low-power sensor networks in nanometer CMOs
Gielen, Georges
ISSCS 2007: International Symposium on Signals, Circuits and Systems, Vols 1 and 2, 2007, : 1 - 2
[2] Performance of Ultra-Low-Power SOI CMOS Diodes Operating at Low Temperatures
de Souza, M.
Rue, B.
Flandre, D.
Pavanello, M. A.
ADVANCED SEMICONDUCTOR-ON-INSULATOR TECHNOLOGY AND RELATED PHYSICS 15, 2011, 35 (05): : 325 - 330
[3] An ultra-low-power CMOS temperature sensor for RFID applications
Xu Conghui
Gao Peijun
Che Wenyi
Tan Xi
Yan Na
Min Hao
JOURNAL OF SEMICONDUCTORS, 2009, 30 (04)
[4] An ultra-low-power CMOS temperature sensor for RFID applications
徐琮辉
高佩君
车文毅
谈熙
闫娜
闵昊
半导体学报, 2009, 30 (04) : 83 - 86
[5] Ultra-low-power CMOS technologies
Schrom, G
Selberherr, S
CAS '96 PROCEEDINGS - 1996 INTERNATIONAL SEMICONDUCTOR CONFERENCE, 19TH EDITION, VOLS 1 AND 2, 1996, : 237 - 246
[6] Ultra-Low-Power CMOS Temperature Sensor for UHF RFID Systems
Peng, Kun
Xu, Yong
Sun, Mingqian
2019 IEEE 13TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2019,
[7] Comparison of Ultra-Low-Power and static CMOS full adders in 0.15 μm FD SOI CMOS
Kamel, D.
Bol, D.
Standaert, F. -X.
Flandre, D.
2009 IEEE INTERNATIONAL SOI CONFERENCE, 2009, : 107 - 108
[8] A gate-level leakage power reduction method for ultra-low-power CMOS circuits
Halter, JP
Najm, FN
PROCEEDINGS OF THE IEEE 1997 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1997, : 475 - 478
[9] Ultra-Low-Power Circuits for Intermittent Communication
Torrisi, Alessandro
Yildirim, Kasim Sinan
Brunelli, Davide
JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS, 2022, 12 (04)
[10] Spintronics for ultra-low-power circuits and systems
Nature Reviews Electrical Engineering, 2024, 1 (11): : 691 - 691

← 1 2 3 4 5 →