A low-power class-AB Gm-C biquad stage in CMOS 40nm technology

被引：0
|
作者：
Centurelli, Francesco [1 ]
Monsurro, Pietro [1 ]
Trifiletti, Alessandro [1 ]
机构：
[1] Univ Rome Sapienza, Dept Informat Elect & Telecommun Engn, Rome, Italy
来源：
2019 26TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2019年
关键词：
Gm-C filter; analog filter; class-AB; low-power circuits; biquad; FILTER;
D O I：
10.1109/icecs46596.2019.8965124
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A low-power class-AB Gm-C biquad stage has been designed using a voltage buffer based on error amplifiers and a push-pull current mirror. The class-AB architecture allows good power efficiency by lowering the required bias current. The biquad stage consumes 250 mu A from a 1.2V supply, and achieves a resonance frequency of 2.2MHz with a Q of 2. The SFDR (spurious-free dynamic range) with a two-tone test is 48dB and the SNR (signal-to-noise ratio) is 44.4dB, with a 400mVpp differential input signal. A pseudo-differential architecture allows large bandwidth and lower power consumption in the transconductance stages. The stage can be used to synthetize lowpass and bandpass filters composed of low-Q stages.
引用
收藏
页码：294 / 297
页数：4
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