Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies

被引:0
|
作者
Kuzmicz, Wieslaw [1 ]
机构
[1] Warsaw Univ Technol, Fac Elect & Informat Technol, Inst Microelect & Optoelect, PL-00661 Warsaw, Poland
关键词
CMOS analog integrated circuit; FD-SOI; feedback; linearity; operational amplifier;
D O I
10.3390/electronics10151800
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Negative feedback applied to the back gate of MOS devices available in FD-SOI (fully depleted silicon on insulator) CMOS technologies can be used to improve the linearity of operational amplifiers. Two operational amplifiers designed and fabricated in a 22 nm FD-SOI technology illustrate this technique, as well as its advantages and limitations.
引用
收藏
页数:12
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