Compact Scalable Modeling of Chipless RFID Tag Based on High-Impedance Surface

This paper proposes a compact model for chipless radio frequency identification (RFID) tag. This compact scalable model consists of capacitors, inductors, and resistors of which their values are directly described by the physical dimension of the chipless tag. Moreover, based on this compact model, radar cross section of chipless RFID tag is predicted, by analyzing polarizability based on surface current distribution in different modes. To validate the proposed model, a 5-bit chipless RFID tag based on high impedance surface (HIS) is presented, with good agreement among modeled, simulated, and measured results. A wide range of physical parameters have also been validated to show the scalability. This compact scalable model of chipless RFID tag not only simplifies the tag design, but also provides an insight understanding of the HIS structure.