共 50 条
- [1] DNNARA: A Deep Neural Network Accelerator using Residue Arithmetic and Integrated Photonics PROCEEDINGS OF THE 49TH INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING, ICPP 2020, 2020,
- [3] Design of an Efficient Deep Neural Network Accelerator Based on Block Posit Number Representation 2024 INTERNATIONAL VLSI SYMPOSIUM ON TECHNOLOGY, SYSTEMS AND APPLICATIONS, VLSI TSA, 2024,
- [4] An efficient deep neural network accelerator using controlled ferroelectric domain dynamics NEUROMORPHIC COMPUTING AND ENGINEERING, 2022, 2 (04):
- [5] An Energy-Efficient Deep Neural Network Accelerator Design 2020 54TH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS, AND COMPUTERS, 2020, : 272 - 276
- [7] A Deep Convolutional Neural Network Based on Nested Residue Number System 2015 25TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, 2015,
- [8] Area-Efficient FPGA Implementation of Minimalistic Convolutional Neural Network Using Residue Number System PROCEEDINGS OF THE 2018 23RD CONFERENCE OF OPEN INNOVATIONS ASSOCIATION (FRUCT), 2018, : 112 - 118
- [9] Increasing of Convolutional Neural Network Performance Using Residue Number System 2017 INTERNATIONAL MULTI-CONFERENCE ON ENGINEERING, COMPUTER AND INFORMATION SCIENCES (SIBIRCON), 2017, : 135 - 140
- [10] An Efficient Accelerator for Deep Convolutional Neural Networks 2020 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - TAIWAN (ICCE-TAIWAN), 2020,